Executive Forum - The Premier Annual Event for Leaders in Optical Networking and Communications
Co-located with OFC, the Premier Event in Telecom and Data Center Optics' this is an Optica Industry Event. The Executive Forum features C-level panelists in an informal, uncensored setting discussing the latest issues facing the industry and your business. Leaders from top companies discuss critical technology advancements and business opportunities that will shape the network in 2024 and the future.For over 25 years, the Optica Executive Forum has been the premier annual event for leaders in optical networking and communications. The forum will be co-located with OFC 2024, the largest and most important gathering of the optical communications community. The Optica Executive Forum is hosted by Optica’s corporate membership engagement program. The Executive Forum features C-level speakers in an informal, unscripted setting discussing the latest business issues facing the industry and your company. Leaders from top companies discuss the business opportunities that will shape the network in 2024 and the future.
Organization also releases C-CMIS IA, publishes AI network operations and 400ZR+ demo white papers and announces next CMIS webinar
Fremont, Calif. – OIF, where the optical networking industry’s interoperability work gets done, has published a new Implementation Agreement (IA) for Common Electrical I/O (CEI) CEI-112G-XSR+-PAM4 Extended Extra Short Reach.
The CEI-112G-XSR+-PAM4 IA specifies a 112 Gb/s PAM4 electrical interface for die-to-die (D2D) and die-to-optical-engine (D2OE) interconnect with bump-to-bump insertion loss up to 13 dB at the Nyquist frequency and baud rate in the range 36 Gsym/s to 58 Gsym/s. The intended applications encompass multiple-chip modules (MCM), co-packaged optics (CPO) and near-package optics (NPO) assemblies. It also details the requirements for the CEI-112G-XSR+-PAM4 extended extra short reach high-speed electrical interface with nominal baud rates between 36 Gsym/s and 58 Gsym/s using PAM4 modulation.
“The CEI-112G-XSR+-PAM4 IA represents a significant milestone, extending the reach of previously published XSR class specifications at this speed range,” said David Stauffer, OIF Physical and Link Layer Working Group Chair and Kandou Bus, S.A. “This IA empowers advanced interconnectivity solutions in die-to-die and die-to-optical-engine scenarios, supporting baud rates up to 112 Gb/s (58 Gsym/s). These specifications have the opportunity to revolutionize multiple-chip modules, co-packaged optics, and near-package optics applications, pushing the boundaries of high-speed data transmission.”
Matt Brown, editor of the CEI-112G-XSR+-PAM4 IA and Alphawave Semi, added, “The CEI-112G-XSR+-PAM4 IA addresses a gap in the set of OIF CEI specifications to address new applications identified by the diverse membership of the OIF.”
OIF also recently released the Coherent Common Management Interface Specification (C-CMIS) IA 1.3, published an Application of Artificial Intelligence (AI) to Enhanced Network Operations technical white paper, published the ECOC 400ZR+ demo white paper and launched a series of CMIS technical webinars.
C-CMIS IA 1.3: This Implementation Agreement extends the Common Management Interface Specification [CMIS] to allow the management of digital coherent optics (DCO) modules. Initially covering 400ZR modules, this IA supports the management of modules that have a single data path with an eight-lane host interface for a 400GBASE-R Ethernet signal and a single-lane 400G coherent media interface based on the 400ZR specification. Future extensions to accommodate other DCO modules are anticipated.
Application of Artificial Intelligence (AI) to Enhanced Network Operations Technical White Paper: This new white paper addresses the interoperability requirements for enhanced network functions that interface between transport networks and their management-control systems. It identifies various use cases for applying AI to guide interoperability and provides insights into data requirements, processing needs, output specifications and interfaces relevant to each use case.
ECOC 400ZR+ Demo White Paper: This paper presents the methodology and results of an interoperability study of OpenZR+ MSA QSFP-DD transceivers conducted during the ECOC 2023 plugfest. Ten different transceivers were cross-connected in a matrix of transmitter-to-receiver combinations using a noise-loaded link to characterize the penalties associated with supplier interoperability. Individual transceiver performance was tested using 400GE traffic over a shortened optical line system link with a DWDM 75GHz fixed channel grid and a separate configuration to capture the transmitter error vector magnitude (EVM) performance. The transceiver receiver OSNR performance is compared against the transceiver transmitter EVM performance for each vendor.
CMIS Technical Webinar Series: OIF is hosting a series of free, public CMIS tutorial webinars. The next webinar, “Data Path State Machine (DPSM) and Application Advertising,” will be held on February 7th. These webinars aim to equip engineers, developers and industry professionals with a comprehensive understanding of CMIS. More information on the series can be found here.
MIGDAL HAEMEK, Israel, and SUZHOU, China, Sept. 7, 2023 – Tower Semiconductor (NASDAQ/TASE: TSEM), a leader in high-value analog semiconductor foundry solutions, and InnoLight Technology, the leader in data center optics, today announced their collaboration to develop multi-generation high-speed optical transceivers based on Tower’s Silicon Photonics process platform (PH18). With production already underway, this strategic partnership is expected to enable cutting-edge solutions to support the growing demands of AI, datacenters, and next-generation telecom networks. According to Yole, a market research firm, the silicon photonic die market is expected to grow at 22% CAGR reaching nearly half-a-billion dollars by 2027.
Dr. Marco Racanelli, Senior Vice President and General Manager of Analog Business Unit at Tower Semiconductor: “We are excited to partner with a leader like InnoLight for the manufacturing of their current and next-generation optical transceiver products. Their significant market presence brings high volumes to our silicon photonics platform turning it into a mainstream solution further establishing our differentiated SiPho platforms as the go to solutions for state-of-the-art optical transceivers in datacenters, AI clusters, as well as for emerging applications such as sensors, automotive LiDAR, and optical computing.”
Tower’s industry-leading high-volume PH18M SiPho platform offers a rich portfolio of optical components, including ultra-high bandwidth modulators, photodetectors, low-loss waveguides, and light coupling solutions. Combined with a mature design enablement infrastructure, the platform delivers accurate model-to-silicon match that empowers designers to bring disruptive solutions to market on time and with minimal design iterations.
InnoLight has launched multiple 400G and 800G products based on the PH18M SiPho platform. 400G parts are currently in mass production while 800G parts are scheduled to be in volume production in Q4, 2023. InnoLight also developed 400G COSA, which will be used in its 400G DCO coherent transceivers.
Osa Mok, the Chief Marketing Officer of InnoLight, commented on the partnership: “InnoLight has established itself as an industry leader by rapidly developing and delivering high-performance optical transceiver products to the market. Our well-established collaboration with Tower firmly demonstrates that we have found a foundry partner who not only possesses best-in-class silicon photonics technology but is also willing to collaborate closely with us to translate our innovations into silicon. We anticipate a successful journey together.”
For additional information about Tower’s SiPho technology offerings, please visit here.
For additional information about Tower’s RF & HPA technology offerings, please visit here.
For more information about InnoLight technology and product, please visit here.
Key highlights:
- UCIe continues to gain momentum with its 1.1 specification release, delivering valuable improvements that extend reliability mechanisms, provide enhancements for the automotive industry, enable lower cost implementations, and establish compliance and interoperability testing specifications.
- UCIe Consortium establishes a new Automotive Working Group to address automotive industry needs.
- The UCIe 1.1 Specification is now available to the public.
August 8, 2023 – Beaverton, OR – Today, the UCIe Consortium announced the public release of UCIe™ (Universal Chiplet Interconnect Express™) 1.1 Specification to deliver valuable improvements in the chiplet ecosystem, extending reliability mechanisms to more protocols and supporting broader usage models. Additional enhancements are included for automotive usages – such as predictive failure analysis and health monitoring – and enabling lower-cost packaging implementations. The specification also details architectural specification attributes to define system setups and registers that will be used in test plans and compliance testing to ensure device interoperability. The UCIe 1.1 Specification is fully backward compatible with the UCIe 1.0 Specification.
“UCIe Consortium is living up to its mission and establishing a vibrant chiplet ecosystem as the industry musters around UCIe technology,” said Dr. Debendra Das Sharma, chairman, UCIe Consortium. “The UCIe
- Specification was developed by leaders in the industry to advance the chiplet ecosystem and address significant demand for full stack streaming protocol enhancements. We’re proud of the progress this release represents toward realizing our vision and our underlying efforts to establish a chiplet ecosystem by developing a robust compliance program.”
Highlights of the UCIe 1.1 Specification:
- Enhancement for automotive includes runtime health monitoring and repair for high reliability applications
- New usages for streaming protocols with full UCIe stack, including simultaneous multiprotocol support with end-to-end link layer functionality
- Cost optimization for advanced packaging resulting from new bump maps
- Enhancements for compliance testing
The UCIe 1.1 Specification is available to the public by request at www.uciexpress.org/specification.
Based on significant market demand from the automotive industry for chiplets built around UCIe technology, the UCIe Consortium is pleased to announce the formation of a new Automotive Working Group. UCIe Consortium Contributor members alongside leadership have already launched this new working group, beginning the development of protocol enhancements for runtime health monitoring and repair.
Meet UCIe Experts at Flash Memory Summit (FMS)
The UCIe Consortium will present a UCIe tutorial session introducing the new features found in the UCIe
- specification at FMS, on August 8, from 1:00 – 5:00 pm PT, in Room 207 at the Santa Clara Convention Center. FMS attendees are also invited to visit the UCIe kiosk within the Open Standards Pavilion on the exhibitor show floor from August 7-10. View the full FMS agenda for detailed information on exhibition schedule and UCIe presentations.
Resources:
- UCIe 1.1 Specification
- UCIe Consortium member statement of support
About UCIe™ Consortium
The UCIe Consortium is an industry consortium dedicated to advancing UCIe™ (Universal Chiplet Interconnect Express™) technology, an open industry standard that defines the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level. UCIe Consortium is led by key industry leaders Advanced Semiconductor Engineering, Inc. (ASE), Alibaba, AMD, Arm, Google Cloud, Intel Corporation, Meta, Microsoft Corporation, NVIDIA, Qualcomm Incorporated, Samsung Electronics, and Taiwan Semiconductor Manufacturing Company. For more information, visit www.UCIexpress.org.
Fremont, Calif. – OIF, celebrating 25 years of getting the optical networking industry’s interoperability work done, today unveiled the External Laser Small Form-Factor Pluggable (ELSFP) Implementation Agreement (IA), defining a revolutionary front panel pluggable form factor tailored to co-packaged optical systems and other multiple laser external laser source applications.The ELSFP IA introduces the first multi-sourced future-proof front panel pluggable external laser source form factor to address the evolving needs of the industry. This innovative IA offers numerous benefits, including definitions for the placement of laser sources at the front panel, the coolest section of the system, enhancing system reliability and allowing for efficient “hot-swap” field replacement when necessary.The ELSFP uses a multi-fiber blind-mate optical connector positioned at the rear of the module. This strategic design mitigates potential eye-safety risks, particularly in applications where high optical powers are involved. Each ELSFP can supply optical power to one or more optical engines, all seamlessly managed by OIF’s Common Management Interface Specification (CMIS).This IA also defines interoperability for mechanical, thermal, electrical and optical parameters as well as establishing standard power ranges and fiber configurations to focus the industry’s development. The final feature unique to ELSFP is the pass-through option which allows systems architects to maximize face plate real estate, solidifying ELSFP’s position as a versatile and adaptable solution for various optical networking applications.“The ELSFP IA represents a significant milestone for the optical networking industry,” said Jeff Hutchins, OIF Board Member and Physical & Link Layer (PLL) Working Group Co-Packaging Vice Chair and Ranovus. “By providing a front panel pluggable external laser source form factor, we’re empowering network operators and equipment manufacturers with a cutting-edge solution that not only improves reliability but also paves the way for future innovations. The ELSFP’s flexible design accommodates the ever-changing needs of the industry, enabling seamless integration with OIF’s 3.2T co-packaged optical module project and beyond.”While the ELSFP project was originally envisioned to complement the 3.2T co-packaged optical module, its forward-looking design makes it easily extensible to address future requirements.“The ELSFP has already garnered a favorable industry reception through its potential to propel external laser source applications forward, as evidenced by strong collaboration among OIF member both in writing the IA and the substantial engagement in numerous interoperability demonstrations facilitated by OIF,” said Jock Bovington, Cisco, and editor of the OIF ELSFP IA.For more information about the ELSFP Implementation Agreement and other OIF initiatives, please visit here.
Lorem ipsum dolor sit amet con
BEAVERTON, Ore., Aug. 2, 2023 — PCI-SIG today announced the formation of a new workgroup to deliver PCI Express (PCIe) technology over optical connections. The PCI-SIG Optical Workgroup intends to be optical technology-agnostic, supporting a wide range of optical technologies, while potentially developing technology-specific form factors.
“Optical connections will be an important advancement for PCIe architecture as they will allow for higher performance, lower power consumption, extended reach and reduced latency,” said Nathan Brookwood, Research Fellow at Insight 64. “Many data-demanding markets and applications such as Cloud and Quantum Computing, Hyperscale Data Centers and High-Performance Computing will benefit from PCIe architecture leveraging optical connections.”
“We have seen strong interest from the industry to broaden the reach of the established, multi-generational and power-efficient PCIe technology standard by enabling optical connections between applications,” said PCI-SIG President and Chairperson Al Yanes. “PCI-SIG welcomes input from the industry and invites all PCI-SIG members to join the Optical Workgroup, share their expertise and help set specific workgroup goals and requirements.”
Existing PCI-SIG workgroups will continue their generational march towards a 128GT/s data rate in the PCIe 7.0 specification, while this new optical workgroup will work to make the PCIe architecture more optical-friendly.
PCI-SIG members can join the new Optical Workgroup in the members workspace.
To become a member of PCI-SIG and participate in technical workgroups, visit www.pcisig.com/membership.
About PCI-SIG
PCI-SIG is the consortium that owns and manages PCI specifications as open industry standards. The organization defines industry standard I/O (input/output) specifications consistent with the needs of its members. Currently, PCI-SIG is comprised of over 900 industry-leading member companies. To join PCI-SIG, and for a list of the Board of Directors, visit www.pcisig.com.
ectetur. Dictum turpis neque eget egestas vitae arcu. Sem iaculis sed blandit id tincidunt ut eu consequat ullamcorper.
Critical applications driving demand for energy-efficient links include data center networking, artificial intelligence training/machine learning and disaggregation
Fremont, Calif.— OIF, where the optical networking industry’s interoperability work gets done, today announced the launch of an innovative new project, the Energy Efficient Interfaces (EEI) Framework. The project, initiated at the Q2 2023 Technical and MA&E Committees meeting in May, will focus on studying new energy-efficient electrical and optical interfaces (which, among others, includes the next generation of low power optics, also referred to as “Linear” or “Direct Drive”). These new interfaces will be required to meet the demands of various applications such as data center networking, artificial intelligence (AI) training/machine learning (ML) and disaggregation.
“With an increasing industry-wide demand, particularly from data center operators, the focus on energy efficiency is more important than ever,” said Rob Stone, Meta Platforms and OIF Board Member. “Addressing this need head-on, the new OIF framework will explore energy-efficient interfaces for the optical interconnects of next-generation data centers that will support the performance scaling of current internet applications and enable groundbreaking AI-driven applications and immersive experiences.”
Through this project, OIF will explore and study energy-efficient links with less than fully retimed interfaces, which have the potential to unlock a multitude of benefits for diverse stakeholders. The objective is to identify critical applications and their requirements for next-generation electrical and optical links, including die-to-die, co-packaged, near-packaged and pluggable solutions. The project will conduct a thorough study to identify critical issues associated with these links and identify opportunities to pursue interoperability standards. The findings of the study will be outlined in the Framework Document, which will serve as a technical white paper for the project.
“A primary goal of this project is to identify new opportunities for interoperability standards, laying the groundwork for potential future collaborations at OIF or other standards organizations,” added Jeff Hutchins, OIF Board Member and Physical & Link Layer (PLL) Working Group Co-Packaging Vice Chair and Ranovus.
“OIF is always listening to the wants and needs our members bring forward, and this project start proposal authored by several industry leading companies directly addresses a need that exists across many IT applications,” said Nathan Tracy, OIF Co-chair of the Market Awareness and Education committee and TE Connectivity. “This one project has the potential to significantly benefit several critical industry applications.”
Additionally, Yi Tang, Cisco Systems, was recently appointed as PLL Working Group Electrical Vice Chair.
About OIF
OIF is where the optical networking industry’s interoperability work gets done. Celebrating 25 years of effecting forward change in the industry, OIF represents the dynamic ecosystem of 140+ industry leading network operators, system vendors, component vendors and test equipment vendors collaborating to develop interoperable electrical, optical and control solutions that directly impact the industry’s ecosystem and facilitate global connectivity in the open network world. Connect with OIF at @OIForum, on LinkedIn and at http://www.oiforum.com.
By Al Yanes, PCI-SIG President and Board ChairFor the past 30 years, PCI-SIG® has been at the forefront of technology innovation. Our PCI Express® (PCIe®) specification has maintained its position as the established de-facto interconnect of choice and a crucial component of the compute continuum. At the PCI-SIG Developers Conference 2022, we celebrated our 30-year anniversary with the announcement of the next evolution of PCIe technology: PCIe 7.0 specification. The forthcoming PCIe 7.0 specification is planned to once again deliver a speed increase in three years, expanding the data rate of the recently released PCIe 6.0 specification to 128 GT/s. The PCIe 7.0 specification is targeted for release to members in 2025.PCI-SIG technical workgroups will be developing the PCIe 7.0 specification with the following feature goals:
Delivering 128 GT/s raw bit rate and up to 512 GB/s bi-directionally via x16 configurationUtilizing PAM4 (Pulse Amplitude Modulation with 4 levels) signalingFocusing on the channel parameters and reachContinuing to deliver the low-latency and high-reliability targetsImproving power efficiencyMaintaining backwards compatibility with all previous generations of PCIe technologyCompanies planning their roadmaps can include the next generation of PCIe technology with the assurance that it will meet their needs for a reliable, high-speed, low latency I/O interconnect. PCIe 7.0 technology will expand the PCI-SIG roadmap to include data-intensive applications and markets, including 800 Gig Ethernet, Artificial Intelligence and Machine Learning (AI/ML), High Performance Computing (HPC), Quantum Computing, Hyperscale Data Centers and Cloud.For additional information on the upcoming PCIe 7.0 specification, please review the
website FAQ.
MALTA, N.Y., March 7, 2022 /PRNewswire/ -- GlobalFoundries Inc (Nasdaq: GFS) (GF) today announced it is collaborating with industry leaders including Broadcom, Cisco Systems, Inc, Marvell and NVIDIA, along with breakthrough photonic leaders including Ayar Labs, Lightmatter, PsiQuantum, Ranovus and Xanadu, to deliver innovative, unique, feature-rich solutions to solve some of the biggest challenges facing data centers today.
The more than 42 billion connected IoT devices generating ~177 ZB of data annually1 combined with the rise of power consumption in data centers, is driving the need for innovative solutions to move and compute data faster and more energy efficiently. These key market trends and implications have catalyzed GF's focus on groundbreaking semiconductor solutions that harvest the potential of photons, instead of electrons to move data and position GF to continue to be the manufacturing leader in the optical networking module market that is projected to grow at a CAGR of 26% between 2021 and 2026, reaching about USD 4 billion by 2026.2
Today GF is proud to announce GF Fotonix™, its next generation, widely disruptive silicon photonics platform. GF has active design wins with major customers, significant market share today and expects its growth in this segment to outpace the market.
GF also announced it is partnering with industry leader Cisco Systems, Inc., on a custom silicon photonics solution for DCN and DCI applications, including an interdependent Process Design Kit (PDK) in close collaboration with our GF manufacturing services team.
Customers and Partner support for GF Silicon Photonics Solutions
"We're working closely with GlobalFoundries to design high-bandwidth, low-power optical interconnects for some of our leading-edge data center products. NVIDIA interconnect solutions manufactured with the monolithic GF Fotonix platform will boost high performance computing and AI applications, enabling breakthrough advances." Edward Lee, vice president of Mixed-Signal Design, NVIDIA
"As one of our trusted semiconductor partners across a broad range of technologies and process nodes, we are happy to see Global Foundries extend their investments for enabling a photonics ecosystem across components and integrated solutions," Liming Tsau, vice president of Foundry Engineering, Broadcom Inc.
"The demands of today and tomorrow's networking and communications infrastructure are requiring higher performance technologies for the design and manufacture of our optical transceiver modules," said Bill Gartner, senior vice president and general manager of Optical Systems and Optics Group, Cisco Systems, Inc. "Our heavy investment and leadership in silicon photonics, combined with GF's feature rich manufacturing technology, allows us to deliver best in class products."
"Marvell continues to lead the industry with the highest performance transimpedance amplifiers and modulator drivers for next-generation optical connectivity solutions for the cloud data centers and carrier markets," said Dr. Loi Nguyen, executive vice president, Optical and Copper Connectivity Group, Marvell. "GF's latest silicon germanium (SiGe) technology enables us to achieve the high bandwidth speeds and power efficiencies that our customers require to meet their ever-increasing data demands."
"Since our earliest days, Ayar Labs and GlobalFoundries have partnered on the development of GF Fotonix, from incorporating our PDK requirements and process optimizations to demonstrating the first working silicon on the platform," says Charles Wuischpard, CEO, Ayar Labs. "The combination of our leading monolithic electronic/photonic solution and GF Fotonix unlocks a tremendous market opportunity for chip-to-chip optical I/O and sets the stage for us to deliver substantial volume shipments by year end."
"At Lightmatter, our technology delivers compute that is faster and more efficient than anything else in the market—results like these aren't possible with conventional chips," said Nicholas Harris, CEO of Lightmatter. "Our next-generation technology is made possible by GlobalFoundries' best-in-class photonic foundry technology and together we're changing the way the world thinks about photonics. This is just the start."
"Our telecoms, defense and data center customers need innovative new ways to transmit, connect and compute data at the speed of light," said Martin Zirngibl, vice president and general manager at Macom. "GlobalFoundries offers the features in its silicon photonics platform that can be leveraged to scale communications to the next level."
"We are leveraging GF's new Fotonix™ platform to develop custom silicon photonics chips that meet our advanced quantum computing requirements," said Fariba Danesh, chief operating officer of PsiQuantum.
"We are delighted to share our multi-disciplinary silicon-photonics IP cores and chiplets, and advanced packaging solutions with our customers who are driving the adoption of novel data center architectures based on integrating best-in-class chiplets and co-packaged optics," said Hojjat Salemi, chief business development officer of RANOVUS. "Our close collaboration with GlobalFoundries underlines our joint commitment to deliver a fully featured set of qualified IP cores and chiplets with OSAT-ready high-volume manufacturing flows and supporting ecosystem to enable the huge potential of monolithic silicon photonics."
"Many chips, operating in parallel and networked together, are required to process the large number of qubits involved in fault-tolerant quantum computing algorithms," said Zachary Vernon, head of hardware at Xanadu. "Leveraging an existing advanced 300mm platform like GF Fotonix gives us a huge advantage in the race to deliver a useful, error-corrected quantum computer."
"Silicon photonics is now recognized as a necessary technology for the datacenter revolution, and our leading semiconductor manufacturing technology platform accelerates adoption into the mainstream," said Amir Faintuch, senior vice president and general manager of Compute and Wired Infrastructure at GF. "GF Fotonix is a feature-rich platform that addresses the most urgent, complex and difficult challenges in areas such as optical networking, super and quantum computing, fiber-to-the-home (FTTH), 5G networks, aeronautics and defense."
GF solutions to move and compute data at speed of light
GF Fotonix is a monolithic platform, the first in the industry to combine its differentiated 300mm photonics features and 300GHz-class RF-CMOS on a silicon wafer, delivering best-in-class performance at scale. GF Fotonix consolidates complex processes that were previously distributed across multiple chips onto a single chip by combining a photonic system, radio frequency (RF) components and high-performance complementary metal–oxide–semiconductor (CMOS) logic on a single silicon chip.
GF is the only pure-play foundry with a 300mm monolithic silicon photonics solution that has demonstrated the industry's highest data rate per fiber (0.5Tbps/fiber). This enables 1.6-3.2Tbps optical chiplets, which deliver faster, more efficient transmission of data, more efficiently with better signal integrity. In addition, the up to 10,000x improvement in system error rate enables next generation artificial intelligence (AI).
GF Fotonix enables the highest level of integration onto a photonics integrated circuit (PIC) so customers can integrate more product functions and simplify their bill of materials (BOMs). End customers can realize greater performance through increased capacity and capability. The new solution also enables innovative packaging solutions, such as the passive attachment for larger fiber arrays, support for 2.5D packaging, and on-die lasers.
GF Fotonix solutions will be manufactured at the company's advanced manufacturing facility in Malta, N.Y., with the PDK 1.0 available in April 2022. EDA partners Ansys, Cadence Design Systems, Inc., and Synopsys provide design tools and flows to support GF's customers and their solutions. GF provides customers with reference design kits, MPWs, testing, pre- and post-fab, turnkey and semiconductor manufacturing services to help customers get to market faster.
In addition, for customers needing discrete, high-performance RF solutions for optical systems, GF also announced it is adding new features onto the GF SiGe platform. High-performance silicon germanium (SiGe) solutions from GF are designed to deliver the speed and bandwidth required to transport information through next generation fiber optic high speed networks.
About GF
GlobalFoundries® (GF®) is one of the world's leading semiconductor manufacturers. GF is redefining innovation and semiconductor manufacturing by developing and delivering feature-rich process technology solutions that provide leadership performance in pervasive high growth markets. GF offers a unique mix of design, development and fabrication services. With a talented and diverse workforce and an at-scale manufacturing footprint spanning the U.S., Europe and Asia, GF is a trusted technology source to its worldwide customers. For more information, visit www.gf.com.
SOURCE GlobalFoundries (GF)
